Workshops

In this page you will find information about past or future workshop co-organized by the E²SWITCH project.
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Steep Transistors Workshop 2016

Energy Efficient Computing Devices and Circuits

11–12th September 2016

EPFL, Lausanne

Following the first successful workshop at University of Notre Dame, USA, a second workshop related to Steep Slope Transistors has been arranged in combination with the ESSDERC conference at EPFL, Lausanne, Switzerland. Steep transistors with subthreshold swings less than 60 mV/decade are attracting attention worldwide due to their promise to enable electronic systems operating at 300 mV and below. Interband tunneling or internal gain mechanisms in the gate enable the steep onset of current with gate voltage. This field has seen dramatic development over the last few years, however there is yet no consensus on materials or device architecture, and the mechanisms limiting current performance are the subject of wide study. There are an increasing number of projections about the application space for these transistors, which is now extending beyond digital into the analog domain. This two-day workshop at the EPFL was build on the experiences from the first workshop to refine understanding and accelerate the development by discussions on electrostatics, influence on defects, materials selection, as well as digital and analogue metrics.
The workshop format followed the organization at the first workshop with short focused presentations given by invited speakers that were combined with focused discussion sessions guided by invited chairs and panelists. The workshop included in the ESSDERC framework and may thus be selected by all participants for a special fee, depending on the participation in the ESSDERC conference. Besides the workshop, a focus session on “Implementation of Steep Slope Transistors for Circuit Applications” has been arranged at the ESSDERC conference.

Download the agenda

Download the participants list

Go to the main meeting page

Organisers

Lars-Erik Wernersson

Lund University, Sweden

E²SWITCH Project

Alan Seabaugh

University of Notre Dame, Indiana

SRC/STARnet Center for Low Energy Systems Technology (LEAST)

Kirsten Moselund

IBM Zuerich, Switzerland

E²SWITCH Project

Aaron Thean

IMEC, Belgium

E²SWITCH Project

Eli Yablonovitch

University of California Berkeley, USA

SRC/STARnet Center for Low Energy Systems Technology (LEAST)

Adrian Ionescu

EPFL, Switzerland

E²SWITCH Project

The organizers are from the European E²SWITCH consortium, the SRC/STARnet Center for Low Energy Systems Technology (LEAST), and the Center for Energy Efficient Electronics Science (E3S). These centers are actively developing steep transistors.

Steep Transistors Workshop 2015

Energy Efficient Computing Devices and Circuits

5–6th October 2015

University of Notre Dame

In the Quest of Zero Power

Energy Efficient Computing Devices and Circuits

26th September 2014

Venice

The 1st workshop of the E²SWITCH project entitled "In the Quest of Zero Power: Energy Efficient Computing Devices and Circuits" was held on September 26th, 2014 in Venice as satellite event to the international conference ESSDERC/ESSCIRC 2014. It was conducted as a scientific dissemination, networking and exploitation event of the E²SWITCH project at the end of the 1st year of work.

The workshop included a series of presentations dealing with state of the art advancements in Tunnel FETs as most promising energy efficient device candidates able to reduce the voltage supply of integrated circuits (ICs) below 0.25V and be hybridized with CMOS technology. It also served as a platform for the discussion of suitable exploitation tracks for the technique.

The programme featured focused reports on DC/AC benchmarking for complementary n- and p-type Tunnel FETs, compact models for digital and analog/RF, device scalability, operational reliability and ITRS metrics. The international keynote invited speakers from USA (prof. Alan Seabaugh) and France (Dr. Francis Balestra and Dr. Costin Anghel) provided vision and opinions from outside the E2-SWITCH Consortium.

The workshop was open to the whole ESSDERC/ESSCIRC audience and to other speakers who attended only the workshop day; the profile of the 25 registrants was very diverse, ranging from PhD students and researchers to industry representatives from both the consortium and the public.

Overall, the different presentations and interactions pointed out the importance and the significant advancement made by the Tunnel FET technology in the last year and its importance as one of the very few device candidates that can offer added value to the well established advanced silicon CMOS.

Workshop programme

Speaker	Title (click to download the presentation)
Adrian M. Ionescu, EPF Lausanne, Switzerland	Introduction: the E²SWITCH project
Alan Seabaugh, University of Notre Dame, USA	Keynote 1: Tunnel FETs: the promise and the reality
Qing-Tai Zhao, Siegfried Mantl, Forschungszentrum Jülich, Germany	Strained Si nanowireTFETs and circuits
Pierpaolo Palestri, Luca Selmi, University of Udine, Italy	Simulation of Tunnel FETs for accurate performance prediction at device and circuit level
Francis Balestra, INP-CNRS, Grenoble, France	Keynote 2: European structuring, roadmapping and networking
Kirsten Moselund, M.Borg, H. Schmid, D. Cutaia, Heike Riel, IBM Zurich, Switzerland	lnAs/Si heterostructure tunnel FETs
Morin Dehan, IMEC, Belgium	Low power Tunnel FET circuits: challenges and opportunities
Costin Anghel, Andrei Vladimirescu, Amara Amara, ISEP, France	Keynote 3: Benefits of SRAM design with tunnel FETs
Lars-Erick Wernersson, University of Lund, Sweden	Tunnel FETs for digital and analog/RF applications
Adrian M. Ionescu, Nilay Dagtekin, Arnab Biswas, EPF Lausanne, Switzerland	Computing and sensing with subthermal swing devices